1. Field of the Invention
This invention relates to semiconductor devices and to a Schottky barrier diode for use in static random access memory cells. More particularly, the invention relates to a Schottky barrier diode structure and fabrication process in which an additional implant is employed to increase the metal-to-semiconductor junction capacitance.
2. Description of the Prior Art
A Schottky barrier diode is formed when a metal layer is deposited on lightly doped N-conductivity type semiconductor silicon. When the metal and the semiconductor are properly selected, the semiconductor acts as the N-type region of a diode. In a Schottky diode, electrons diffuse from the N-type semiconductor material and form a thin dense layer at the interface of the metal and the semiconductor. The forward current is carried by electrons flowing from the semiconductor to the metal contact. No recombination occurs because the injected electrons are also majority carriers in the metal.
A primary advantage of Schottky diodes is that they conduct at very low forward voltages, and thus switch rapidly. Schottky diodes therefore are widely applied in bipolar integrated circuits, such as static random access memory cells.
In bipolar circuits, Schottky diodes are formed by depositing a metal, typically aluminum, on an epitaxial silicon layer doped with an impurity concentration on the order of less than 1.times.10.sup.16 atoms per cubic centimeter. Typically in static random access memory cells (SRAMs), a P-conductivity type guard ring is employed to reduce the electric field around the periphery of the diode.
Unfortunately, Schottky diodes fabricated according to the above approaches suffer from several disadvantages. First, as integrated circuit process technology continues to improve, memory cells are fabricated in smaller and smaller areas and thus, have less and less capacitance. The corresponding small Schottky diode area with low capacitance, in parallel with a load resistor, results in a high impedance which increases the time constant of the static random access memory cell and thereby results in undesirably slow access times. Potentially even more important, SRAM cells of the prior art with their low capacitance and low critical charge suffer from undesirably high soft error rates as a result of alpha particle impacts. In these prior art cells, the alpha particles change the state of the cell they impact, resulting in an error which must be corrected by software error detection and correction routines. While these routines can correct single bit errors in a word, two bit errors in a single word are not usually correctable, resulting in erroneous data or a system fault.